Delhi Launches 23 New Semiconductor Chip Design Projects To Boost Innovation Efforts
The Indian government has approved 23 semiconductor chip-design projects under the Design Linked Incentive (DLI) Scheme, aiming to strengthen domestic innovation and reduce import dependency. Targeting applications such as surveillance, energy meters, microprocessor IPs, and networking, these initiatives involve startups, MSMEs, and academic institutions. With ₹1,000 crore allocated for design support under the broader ₹76,000 crore Semicon India Programme, the move marks a strategic push to build a self-reliant semiconductor ecosystem.
Announcing the projects in the Lok Sabha, the Union Minister of Electronics and Information Technology highlighted that the DLI Scheme is designed to bridge gaps in design capabilities and commercialization timelines. “This initiative provides access to advanced Electronic Design Automation tools and intellectual property cores, helping domestic firms convert research into commercially viable chip solutions,” an official said.The scheme addresses the high entry barriers and extended development cycles that have historically hindered semiconductor innovation in India. Participating companies can claim reimbursement of up to 50 percent of project costs, capped at ₹15 crore, while additional incentives of 4 to 6 percent of net sales turnover over five years are offered for commercialization, with a ceiling of ₹30 crore. These measures aim to reduce financial risk and encourage investment in cutting-edge designs.
Since its launch in December 2021, the DLI Scheme has attracted 278 academic institutions and 72 startups, all gaining access to modern EDA tools. Notable successes include 20 chip designs fabricated at the Semiconductor Laboratory in Mohali and six companies completing prototype tape-outs at global foundries. Furthermore, ten startups have secured venture capital funding to support commercial scaling, demonstrating growing investor confidence in India’s semiconductor ecosystem.The total approved project outlay under the scheme is ₹803.08 crore, which includes EDA tool costs. Fund disbursement is milestone-based, tied to prototype development, testing, and deployment. The government continues to consult closely with industry stakeholders and has signalled flexibility to adapt incentives based on ongoing feedback, ensuring the scheme evolves alongside market needs.
Experts suggest these initiatives could significantly bolster India’s position in the global semiconductor industry, supporting technology self-reliance and digital infrastructure development. As domestic capabilities grow, cities and enterprises may benefit from homegrown chips powering energy-efficient devices, secure communications, and smarter urban solutions. The scheme, therefore, not only nurtures innovation but also aligns with broader goals of sustainable and inclusive technological growth.
